The voltage range of voltage supplies powering integrated circuits (ICs) continues to decrease. When a voltage range of a signal generated within an IC remains constant as the voltage range of the voltage supply of the IC decreases, a voltage margin between the upper end of the voltage range of the signal and the positive supply rail of the IC and/or a voltage margin between the lower end of the voltage range of the signal and the negative supply rail of the IC decreases. As one or both of these voltage margins decrease, the voltage applied across an input device and/or an output device of a circuit processing the signal can decrease. Depending upon the device, sufficiently decreasing the voltage applied across an input device and/or an output device can render the device inoperable.
The problem of shrinking voltage margins can be compounded when a voltage margin must be maintained to discern between two distinct voltage levels within a signal even as the voltage range of an IC voltage supply decreases. In that case, sufficient voltage margins must be maintained to distinguish between the two distinct voltage levels of the signal as well as to retain sufficient voltage across input and/or output devices to assure the devices remain operable while processing the signal.
In illustration, typically within an IC memory, an address line is enabled during a data operation, e.g., a read or a write, that provides access to data stored at the enabled address location. Generally, the signals used to drive address lines are buffered in order to provide the drive capacity necessary to charge and discharge the large capacitive loads that appear upon the address lines. Often, the signal level used to drive the address line during a data operation varies depending upon whether the data operation is a read or a write. As such, in order to distinguish a voltage level of a read operation from a voltage level of a write operation, some discernable voltage margin must exist between the read voltage level and the write voltage level. As IC memories migrate to lower supply voltages, it is preferable to preserve the voltage margin that distinguishes the read voltage level from the write voltage level.
In order to preserve the voltage margin between the read voltage level and the write voltage level in the face of decreasing IC voltage supplies, the voltage margin between the read voltage level and one rail of the voltage supply and/or the voltage margin between write voltage level and the other rail of the voltage supply must decrease. Accordingly, the voltage applied across an input device and/or an output device of the address line buffer can decrease. Thus, within an IC memory utilizing a low voltage supply, in order to provide a sufficient margin between read and write voltage levels, it may be necessary for an address line buffer to remain operable when buffering address line signals that approach either end of the voltage range of the voltage supply.